There is continual pressure for integrated circuits to be increasingly faster and increasingly more powerful. Both of these objectives tend to be influenced by the size of the integrated circuits. By fabricating smaller integrated circuits, electrical pathways are shorter and more devices are formed within a given space, which tends to result in a faster, more powerful integrated circuit.
As the size of devices is reduced, it is increasingly difficult to adequately fill and cover the devices with the successive layers of material from which the devices are formed. This is because the small feature size tends to produce surfaces that are extremely uneven. If the extremely uneven surfaces are not modified in some manner, then the overlying layers of material tend to suffer from a variety of problems, such as not conforming to the underlying surface in a uniform manner, forming pinholes and cracks either during deposition or during subsequent processing, and cracking from unbalanced and unalleviated stresses.
These problems, and others, are reduced in large measure by planarizing in some manner an existing underlying surface of an integrated device after it is formed and before an overlying layer is deposited. One method of planarizing is chemical mechanical polishing. During chemical mechanical polishing, the face of the substrate in process is held against a rotating polishing pad by an end effector that contacts the back of the substrate. The end effector may also be rotating and translating the substrate over the surface of the polishing pad. Typically, a slurry of some sort, such as water, aqueous etchants, or a polishing rouge is present on the pad to aid in the polishing action.
As the abrasion between the substrate surface and the pad occurs, material is removed from the surface of the substrate. The material removed from the surface of the substrate is removed at a rate that is dependent upon several factors, such as the speed of the pad, the type of etchant or rouge that is used in the process, and the specific characteristics of the materials which comprise the surface being polished away in the chemical mechanical polishing process. Therefore, even with all other variables held constant, different types of materials tend to have different chemical mechanical polishing rates.
For example, if a surface that is being polished has regions of two different materials, one of the materials may have a polishing rate that is greater than the polishing rate of the other material. In this case, the regions of the surface that are formed of the material with the greater polishing rate will tend to erode at a faster rate than the regions that are formed of the material with the slower polishing rate. When this happens, the thickness of the surface decreases faster in the high polishing rate regions and the thickness of the surface decreases slower in the low polishing rate regions. This difference in the rate at which the thickness of the surface decreases tends to cause a surface defect at the interface between the regions with different polishing rates. This surface defect tends to resemble a taper at the interface between the higher polishing rate region and the lower polishing rate region, where the region with the lower polishing rate is at a higher level than the region with the higher polishing rate.
As the very purpose for performing the chemical mechanical polishing process is to reduce and planarize the topographical features of the surface being polished, the taper surface defect is viewed as a deleterious anomaly in the polished surface, and is not desired. However, the design goal of elimination of the deleterious taper is in competition with the design goal of forming surfaces that have regions formed of different materials, some of which may have different polishing rates.
What is needed, therefore, is a system for planarizing the surface of an integrated circuit that reduces or eliminates the deleterious taper that forms between regions of the surface that are formed of materials that have different polishing rates.